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features single +5 v power supply 18-bit resolution 94 db dynamic range linear phase digital anti-alias filtering 0.05db passband ripple 80db stopband rejection low power dissipation: 150 mw power-down mode for portable applications complete cmos stereo a/d system delta-sigma a/d converters digital anti-alias filtering s/h circuitry and voltage reference adjustable system sampling rates including 32khz, 44.1 khz & 48khz general description t h e cs5 3 30a / 3 1 a is a c o mpl e t e stere o a n alo g -to- di g it a l c o nv e rter w h ich performs anti-alia s filtering, s a mplin g a n d a n alo g -to-di g it a l c on v ersio n g en e r a ti n g 1 8 - b it val u es f o r both left a nd right inp u t s i n s e rial f o rm. t h e o u t p ut sam p le rate c a n b e infinitely adj u ste d be- twee n 2 a n d 5 0 k hz. t h e cs 5 33 0 a / 3 1 a o p erate s f rom a s ingl e +5v s up p ly a n d re q u ire s onl y 1 5 0 m w for n o rmal o peratio n , mak- in g it ide a l for battery-pow e r e d ap p licatio n s. t h e adc us e s d e lta-sigm a mo d u latio n wit h 1 2 8 x ov e r- s a mplin g , follow e d by di g it a l filtering a n d de c imation, whi c h remo v e s th e ne e d for an e xternal anti-alia s filt e r. t h e lin e a r- p ha s e di g it a l filter h a s a p a s s ba n d to 2 1 . 7 kh z , 0.05 d b p a s s ba n d ri p p le a n d > 8 0 db stop- b a nd rej e ction. t h e d e vi c e a ls o co n t a in s a h ig h pa s s fil t e r to r e mov e dc offsets. t h e d e vic e is a v aila b le in a 0.20 8 " wid e , 8 - p in s u rfa c e m o u n t p a c k a g e . ordering informa t i on: mod e l t emp. r a nge p a ck a g e t y pe cs53 3 0a-ks -1 0 to 7 0 c 8 - p in pla s t i c soic cs53 3 1a-ks -1 0 to 7 0 c 8 - p in pla s t i c soic cs53 3 0a-b s - 4 0 t o + 8 5 c 8 - p i n p l a s t i c s o i c cs53 3 1a-b s - 4 0 t o + 8 5 c 8 - p i n p l a s t i c s o i c cirrus logic, inc. crystal semiconductor product division p.o. box 17847, austin, tx 78760 (512) 445-7222 fax: (512) 445-7581 http://www.crystal.com ma r 9 9 ds 1 38 f 2 1 8-pin, stereo a/d converter for digital audio CS5330A cs5331a ainr s/h agnd ainl s/h dac serial output interface voltage reference comparator comparator lp filter lp filter va+ sclk digital decimation filter digital decimation filter sdata mclk dac high pass filter high pass filter lrck 8 5 6 4 2 3 1 7 copyright ? cirrus logic, inc. 19 9 9 (all rights reserved)
analog characteristics ( t a = 2 5 c; va+ = 5v; - 1 d bfs i n put sinew a ve, 99 7 h z ; f s = 48 kh z ; mclk = 1 2 .28 8 mh z ; sclk = 3 . 0 72 mhz; mea s ureme n t ba n d width is 1 0 h z to 2 0 k hz unl e ss oth- erwis e s pe c i f i e d; l ogi c 0 = 0v, l ogi c 1 = vd+) p a r a m e t e r sy m bol 5 33 0 a / 3 1a-ks min typ max 5 33 0 a / 3 1a-bs min typ max units tem p erature ran g e t a -10 to + 7 0 -40 to + 8 5 c dynamic performance dyn a mic ran g e a-wei g h ted 8 8 9 4 - 86 92 - 86 94 - 84 92 - db db total harmo n ic distor t i o n+noise ( n o t e 1 ) -1db - 2 0db - 6 0db t hd + n - -84 75 - -72 66 - -32 26 - -84 75 - -72 66 - -32 26 db db db total harmo n ic distorti o n -1db t hd - 0.003 0 . 0 2 - 0 .003 0 . 0 2 % i n t e r c ha n nel ph a se de v iation - 0 - - 0 - d e g ree i n t e r c ha n nel isol a ti o n (dc to 20 kh z ) - 9 0 - - 9 0 - db dc accuracy i n t e r c ha n nel gai n mi s match - 0 .1 - - 0.1 - db gain er r o r - - 10 - - 10 % gain dri f t - 150 - - 150 - p p m / c o f f s et e r r o r ( n o t e 2) - - 0 - - 0 l s b analog input full sc a le i n put voltag e r a nge v i n 3 . 6 4 . 0 4 . 4 3 . 6 4 . 0 4 . 4 vpp i n put im p ed a nce (f s = 48 kh z ) zin - 100 - - 100 - k w i n put bias volta g e - 2.4 - - 2.4 - v power supplies power sup p ly cur r e nt ( n o t e 3 ) va+ p o wer d own i a + - 3 0 4 2 - 100 1 0 00 - 3 0 4 2 - 100 1 0 00 ma m a p o w e r di s s i p a t i o n ( n o t e 3) n o r m a l p o wer d o wn - 150 220 - 0 .5 5 . 25 - 150 220 - 0 .5 5 . 25 mw mw power sup p ly rejec t i o n ratio psrr - 5 0 - - 5 0 - db * re f er to parameter definitions at the end of this data sheet. note s : 1 . referen c ed to t y pic a l full-s c ale in p u t v o ltag e (4.0 vp p ) 2 . i n t e r n al hig h pa s s filte r r e m ov e s off s et. 3 . for max p o wer c alc u lation s , vd = 5.2 5 v. cs5 3 3 0 a / c s 5 3 3 1a 2 ds1 3 8f 2
digital filter characteristics ( t a = 25 c; va+ = 5 v 5 % ; f s = 4 8 k hz ) p a r a m e t e r s y mbol min t y p max units pas s ba n d (0.0 5 d b) (n o t e 4 ) 0 . 0 2 - 2 1.7 khz pas s ba n d ripple - - 0 . 05 db s t o p b a n d ( n o t e 4) 29 - 6 1 1 5 k h z s t o p b a n d a t t e n u a t i on ( n o t e 5) 80 - - d b g r o u p d e l a y ( n o t e 6) t gd - 15/fs - s gr o up del a y variation v s . fre q ue n cy d t gd - - 0 m s high pass filter characteristics freq u en c y res p on s e: -3 db (n o t e 4 ) -0.1 db - - 3.7 20 - - hz hz pha s e devi a ti o n @ 20 hz (n o t e 4 ) - 1 0 - degree pas s ba n d ripple - - 0 db notes : 4 . filter charac t e r is t ics sc a le wi t h o utput sam p le r a t e . 5 . th e a nal o g mod u lator s a mpl e s t h e inp u t at 6.14 4 mh z for an o u t p ut s a mpl e rate of 48 kh z . t h ere is no reje c ti o n of i n put sig n als whi c h are multiple s o f the s a mplin g freq u en c y ( n x 6.1 4 4 mh z 2 1.7khz w h e re n = 0 , 1 , 2 , 3 . .. ) . 6 . gr o up d e lay fo r f s = 4 8 khz, t g d = 15/4 8 kh z = 3 12 m s digital characteristics ( t a = 25 c; va+ = 5 v 5 % ) p a r a m e t e r s y mbol min t y p max units high-l e vel inp u t volta g e v ih 2.4 - - v low-l e vel inp u t volta g e v il - - 0 . 8 v high-l e vel outp u t volta g e at l o = - 2 0 m a v oh (vd+ ) -1.0 - - v low-l e vel outp u t volta g e at l o = 20 m a v ol - - 0 . 4 v i n put le a ka g e curr e n t i in - - 1 0 .0 m a cs5 3 3 0 a / c s 5 3 3 1a ds1 3 8f 2 3
absolute maximum rating s (agnd = 0v, all volta g es with r e sp e ct to gro u nd.) p a r a m e t e r s y mbol min t y p max units dc p o wer s u ppl y : va+ -0.3 - +6.0 v i n p u t c u r r e n t, a n y p i n e x c e pt s u p p l i e s ( n o t e 7) i i n - - 10 ma anal o g i n put voltage (n o t e 8 ) v ina - 0 . 7 - ( v a + ) +0.7 v digital i n put voltage (n o t e 8 ) v ind - 0 . 7 - ( v a + ) +0.7 v ambie n t t e mperature (pow e r a p plie d ) t a - 5 5 - + 125 c s t o r a ge t e mperature t stg - 6 5 - + 150 c notes : 7 . any pin exce p t s u ppli e s. t r a nsi e n t cur r e nts of u p t o +/- 1 0 0 m a o n t h e an a log in p u t p ins will not ca u se scr latch-u p . 8 . th e m a ximum o v er/ u nd e r v o lt a ge is limited b y th e i n put current. w arning : operatio n a t or be y on d th e se limits may res u lt in p e rm a ne n t d a mag e to the d e vic e . normal op e r a ti o n is not gu a r a ntee d a t the s e extreme s . recommended operatin g conditions (agnd = 0v; a ll v o ltag e s wit h re s pe c t to grou n d) p a r a m e t e r sy m bol m i n typ m a x uni t s dc p o wer s u ppli e s: va+ 4.75 5 . 0 5.25 v anal o g i n put voltage (n o t e 9 ) v in -4 - v p p anal o g i n put bias volta g e 2 . 2 2 . 4 2 . 6 v note: 9 . th e o utput co d es will clip at f u l l scal e with in p u t sign a ls > f u l l scale a n d < va+. s p ecific a ti o ns are s u bje c t to ch a ng e with o ut n o tice. cs5 3 3 0 a / c s 5 3 3 1a 4 ds1 3 8f 2
switching characteristics ( t a = 2 5 c ; va+ = 5 v 5 % ; inp u t s : l o gic 0 = 0 v, l o gic 1 = va+ ; c l = 2 0 pf) swit c h in g c hara c t e ri s ti c s are gu a r a ntee d b y ch a r a cterizatio n . p a r a m e t e r symbol m i n t yp m a x units output sampl e r a t e fs 2 - 5 0 khz mclk period mclk / lrck = 2 56 t clkw 78 1 0 00 ns mclk low mclk / lrck = 2 56 t clkl 31 - 1 0 0 0 n s mclk high mclk / lrck = 2 56 t cl k h 31 - 1 0 0 0 n s mclk period mclk / lrck = 3 84 t clkw 52 1 0 00 ns mclk low mclk / lrck = 3 84 t clkl 20 - 1 0 0 0 n s mclk high mclk / lrck = 3 84 t cl k h 20 - 1 0 0 0 n s mclk period mclk / lrck = 5 12 t clkw 39 1 0 00 ns mclk low mclk / lrck = 5 12 t clkl 13 - 1 0 0 0 n s mclk high mclk / lrck = 5 12 t cl k h 13 - 1 0 0 0 n s master mode sclk f a lling to lrck t mslr -10 - 10 ns sclk f a lling to sdata valid t sdo -10 - 35 ns sclk duty cycle - 50 - % slave mode lrck duty c y cle 25 50 7 5 % sclk period t scl k w ( n o t e 1 0 ) - - n s sclk puls e w idth l o w t scl k l ( n o t e 1 1 ) - - n s sclk puls e w idth hig h t s c lkh 20 - - ns sclk f a lling to sdata valid t d s s - - (note 1 2 ) n s lrck ed g e t o msb v a lid t lrdss - - (note 1 2 ) n s sclk ri s ing to lrck ed g e del a y t sl r 1 20 - - ns l rc k e d g e t o r i s i ng s c l k s e t u p t i me t s l r 2 ( n o t e 1 2 ) - - n s notes: 1 0. 1 64 f s 1 1 . 1 1 28 f s - 15 n s 1 2 . 1 2 56 f s + 5 ns cs5 3 3 0 a / c s 5 3 3 1a ds1 3 8f 2 5
sda t a s c l k i n put (s l a v e mode) (s l a v e mode) lrck i n put sclkh t d s s t m s b ms b -1 s c l k l t slr1 t s l r 2 t t sc l k w scl k to lrck & sdat a - s lave mode (cs5331a) sclk output t mslr sdata t sdo lrck output sclk to sdata lrc k - m a s te r mode (cs5331a) s c lk ou t put sd a t a t s d o lrc k o u t p ut t mslr s cl k to sdata lrck - master mode ( c s 5330a) sda t a s c l k i n put (s l a v e mode) (s l a v e mode) lrck i n put sclkh t d s s t msb m s b-1 ms b -2 lrdss t s c l k l t slr1 t s l r 2 t t sc l k w s cl k to lrck & s dat a - slave mode ( c s 5330a) cs5 3 3 0 a / c s 5 3 3 1a 6 ds1 3 8f 2
10 m f v a + a g nd +5v an a log a i nl a i nr + 0 . 1 m f cs53 3 0a cs53 3 1a lrck mclk sc l k t i m i n g l og i c & clock au d io da t a p ro c e s s o r a n al o g in p ut c i r c ui t s 150 w s d a t a 4 7 k w * * r e q u ired f or m a s t er m o de o nly ** 8 5 7 4 2 3 1 6 . 0 1 m f 1 5 0 w ** . 0 1 m f 1 k w 1 k w 1 k w 1 k w ** op t i o n a l i f a n a l o g i n p u t c i r c u i t s b i a s e d to wi t hin 5 % o f c s 5 3 3 0 a /c s 5 3 3 1 a n o mi n a l i n p u t bi a s vo l t a g e . 4 7 m f . 4 7 m f f i g u re 1. t y p ic a l co n n ec t i o n di a g r am cs5 3 3 0 a / c s 5 3 3 1a ds1 3 8f 2 7
general descrip t ion the c s53 3 0a a n d cs5 3 31a are 1 8-b i t, 2 -ch a n- n e l an a lo g -to-d i gi t al c o n v ert e rs d e s i gn e d for d i gi t al a ud i o a p pl i ca t io n s. each d e v i ce u s e s two o n e-b i t de l ta-si g ma mo d ul a tors whi c h simu l ta n e- o u s l y samp l e t h e an a log in p ut si g na l s a t 1 2 8 t i m e s t h e ou t put samp l e r a t e (fs). the resu l ti n g s e r i a l b i t s t r e a m s a re d i g i t a l l y f i l t e re d , y i e l d i ng p a irs o f 18- b it v a l ues. t h is te c hn i que yi e lds n e arly i de a l co n v ersi o n perf o rm a nce i nd e pe n de n t o f i n put fr e qu e n c y a n d ampl i tu d e. t h e c o n v e rters do n o t r e qu i re d i f f i c ul t -to- d esign or exp e ns i ve a n ti- a li a s f i l t ers a n d do not req u ire ext e rnal sam- p l e-a n d-h o ld a m p li f i e rs o r a v o l t a g e ref e ren c e. th e cs5 3 30 a and cs 5 33 1 a di f fer o n ly i n t h e o u tp u t serial data f o r m at. t h ese forma t s are dis- c u ssed in t h e f o ll o wi n g se c ti o ns a n d sh o wn i n fi g u res 2 a nd 3 . an o n-c h ip v o ltage refere n ce p r o v i des for a s i n- g l e - e n d e d i n p u t s i g n a l r a n g e o f 4 . 0 v p p . o u t p ut d a ta i s a v a i la b le i n seri a l form, c o ded a s 2 s c o m p leme n t 1 8-b i t n umbers. t yp i cal p o wer c o n- sumpt i on i s 1 50 mw whi c h c a n be furt h er re d u c e d to 0 . 5 m w usi n g the p o we r -d o wn mode. f or more inf o r m ati o n on delta-s i gma m o du l a- t i on, see t h e r e fere n ces at the end of t h is da t a sheet. syste m des i gn v ery f e w e x ter n a l comp o ne n ts are r e qu i red t o sup p or t the adc. n o rm a l p o w e r sup p ly d ec o u- p l ing c o m p on e nts a n d a r e s i s t or a n d ca p ac i tor o n e a c h in p u t for a nt i -al i asing are a l l t ha t s r e qu i red, as sh o wn in fig u re 1. mast e r c lo c k the mast e r cl o ck (m c lk) r u ns t he d i gi t al f il t er a n d i s use d to g en e rate the de l ta-si g ma m o du l a- t o r s a m p l i n g c l o c k . t a b l e 1 s h o w s s o m e c o m m on m a s t er c l ock fr e qu e nc i e s. the ou t pu t s a mp l e ra t e i s eq u al to the fre q ue n c y o f t h e lef t / ri g ht c l o c k (lr c k) . the ser i al n at u re of t he o ut p ut d ata resul t s i n t h e l e ft and r i ght d ata words be i ng r e a d a t di f fere n t t i m e s. h o w e ve r , the w or d s w i th i n an l r ck c y cle r e prese n t s i m u lt a ne o usly samp l e d an a log i n pu t s. the s e rial cl o ck (s c lk) sh i fts t h e d ig i ti z e d au d i o da t a fr o m the i n ter n al d ata r e g i s t ers via the s d a t a pi n . s e r i al d a ta int e rf a ce the c s53 3 0a and c s53 3 1a can b e op e rat e d in e it h er m a s t er mod e , w h ere s c lk a nd l r c k are o u t p u t s, o r sl a v e m o d e , w h e r e s c l k a n d l r c k are i np u ts. m a s t er mode in master mo d e, sclk and lr c k a re ou t pu t s w h ich are i nt e rna l ly d er i v ed from mc l k. t he c s53 3 0a/ 3 1a w i l l d i vi d e m c lk b y 4 t o g e ner- a t e a s c lk wh i ch i s 64 fs and by 2 5 6 to g en e rate l r ck. t h e cs5 3 30a a n d cs5 3 31a c a n b e pl a ced in the master mo d e wi t h a 4 7 ko h m pu l l-d o wn resistor o n t h e s d a t a p in a s s h o w n i n f i g u r e 1. s l ave mode lr c k and sclk be c o me i n pu t s i n sl a ve mo d e. l r ck must be e x t ernally d er i v ed fr o m m c lk a n d be e q ual to fs. t h e fr e qu e n c y of s c lk sh o uld be e qu a l to 64 l r ck, t ho u gh o th e r freq u en c ies are possib l e. m c lk fre q ue n ci e s of 2 5 6 , 3 8 4 , and 5 1 2 fs a re s u pp o rte d . the ra t i o of t h e ap p li e d m c lk to lrck ( k h z) mclk ( mhz) 2 5 6 38 4 5 1 2 32 8 . 1 920 1 2 .28 8 0 1 6 . 3 840 4 4 .1 11.2 8 96 1 6 .93 4 4 2 2 . 5 792 48 12.2 8 80 1 8 .43 2 0 2 4 . 5 760 t a b le 1. com m on c l ock freq u encies cs5 3 3 0 a /cs5 3 3 1 a 8 ds1 3 8f 2
lrck i s a ut o m a ti c al l y de t ec t ed d u ring p o w e r - u p a n d i nt e rnal d i v i ders a re set to g e ner a te t he a p- pr o pri a t e i nt e rnal cl o cks. cs 5 33 0 a th e cs 5 33 0 a d ata o ut p u t forma t is sh o wn i n fi g ure 2 . n o ti c e t h at t h e msb is c lo c k e d by t h e tr a nsit i o n of lrck a nd t he r e m a in i ng s e v e n te e n d a t a b i ts are c l ocked by t h e fal l ing e d g e of sclk. the d a t a bi t s ar e v a lid d u ring t h e risi n g e d ge o f sc l k. c s53 3 1a the c s53 3 1 a da t a ou t put format is sh o w n in f i gure 3 . not i ce the o n e s c lk per i od de l ay be- t ween t h e lr c k tr a nsit i ons a n d the msb of t he d at a . t h e fal l ing ed g es of sclk c a use t h e adc t o o ut p ut the e i gh t een d a ta bi t s. the d a ta bi t s are v a l i d d u r i n g t h e r i s i n g e d g e o f s c l k . l r c k is a l so i n v e rted c o m p ared to t h e c s53 3 0a i n ter- fac e . th e cs 5 33 1 a i n terface is c ompa t ib l e w i th i 2 s. 0 1 2 1 8 1 9 2 0 2 1 22 31 0 1 2 1 8 1 9 2 0 2 1 2 2 23 31 0 1 sclk lrck left audio data right audio data 17 16 10 1 7 16 1 0 sdata 3 3 30 f i gure 3. da t a o u tp u t ti m in g - c s 5331a (i 2 s co m pat i ble) 0 1 2 1 8 1 9 2 0 21 22 31 0 1 2 1 8 1 9 2 0 21 2 2 23 31 0 1 sclk lrck left audio data right audio data 17 16 10 1 7 16 1 0 sdata 17 1 7 30 f i gure 2. da t a o u tp u t ti m in g - c s 5330a c s 53 3 0 a / c s 5 3 3 1a ds1 3 8f 2 9
an a log connect i ons fi g ure 1 s h o ws the a na l og i n put c on n ec t io n s. the a n al o g in p uts are pr e s e nt e d to t h e m o du l a- t o rs via t h e ainr a nd ainl p i ns. ea c h a n al o g i n put w i ll a c ce p t a m a ximum of 4 vpp ce n ter e d at + 2 .4 v . the cs5 3 30a / 31a s a m p les t he an a log i n pu t s a t 1 2 8 fs, 6 . 1 4 4 mhz f o r a 4 8 khz sa m p le-rate. the d i gi t al f il t er rej e cts all n o is e a b o v e 2 9 k hz e x ce p t for freq u en c ies rig h t aro u nd 6 . 1 4 4 mhz 2 1 .7 khz (a n d mu l ti p les o f 6 . 1 4 4 mh z ) . most a u dio si g na l s do n o t h a v e sig n i f ic a n t en e r g y a t 6 . 1 4 4 mhz. n e v e rth e less, a 1 5 0 w r e s i s t or in s e- ri e s wi t h ea c h an a log i np u t and a 1 0 nf c a pa c it o r a cross t he i n pu t s wi l l at t en u ate any n o is e en e r g y a t 6 . 1 4 4 mhz, i n a dd i ti o n t o p ro- v i d i n g t h e o p t i m u m s o u r ce i m p e d a n c e f o r t he mod u la t ors. the use of c a pa c it o rs wh i ch h a ve a l a r g e v o l t a g e c o e f f i c i e n t must be a v oi d ed sin c e t h ese w i l l d e g rade sig n a l li n ear i t y . it i s a l so im- p o rta n t t h at t he se l f-resonant fre q ue n c y of t h e c a pa c it o r b e well a b o v e t h e mo d ul a to r s a m p li n g fre q ue n c y . gen e ra l pur p ose c e ramics a n d f ilm c a pa c it o rs do n o t meet t h ese r e qu i remen t s. h o w- e v e r , np o and co g ca p ac i tors a re a c ce p ta b l e. if a c t i v e c i rcu i try pr e ce d es t he adc, it is r e com- men d ed th a t t he abo v e rc f i lt e r is p l ac e d b e twe e n t h e ac t i ve cir c ui t ry and t he ainr a n d ainl pi n s. t he a b o ve e x a m p le fre q ue n ci e s sca l e l i ne a rly w i th fs. high pass filter the op e rat i on a l a m p li f i e rs in the i n put cir c ui t ry dr i v i ng t h e cs5 3 30a / 31a may g e ner a te a sma l l dc o f fs e t in t o the a / d c o n v ert e r . t h e cs 5 33 0 a/3 1 a i n cl u des a h i g h pass f il t er af t er t h e d ec i m a to r to r e mo v e a n y dc o f fset whi c h c o uld resu l t i n re c ord i ng a dc l e v e l, possib l y y i el d ing " c li c ks" w h e n swit c hi n g be t ween d e- v i ces in a mul t ic h an n el syst e m. th e c h ara c ter i s t ics o f t h is f irst-or d er h igh p a ss f il t er are o u tl i ned b el o w for fs eq u al 48 khz. th i s f il t er respo n se sc a les li n ear l y w i th s a m p le r a te. fr e qu e n c y respo n s e :-3 d b @ 3 .7 hz - 0 .1 db @ 20 hz p h ase d e v i at i on : 10 d e gr e es @ 20 hz p a ssb a nd r i pp l e:n o ne ini t ia l izat i on and p o wer-d o w n the i n it i al i za t ion a n d p o we r -d o wn seq u en c e i s sh o wn in fig u r e 4 . upon i n it i al p o we r -up, t he d ig i tal f i l ters a n d de l ta-si g ma mod u la t ors are re- set a n d t h e i n ter n al v o ltage refere n ce i s p o wered d o w n . t h e d e v ice wi l l r e m a i n in t he i n it i al p o we r -d o wn mo d e u nt i l m c l k is prese n te d . o n ce mclk is a v a i la b l e, the c s53 3 0a/ 3 1 a w i ll mak e a mast e r/sl a v e mo d e de c ision b ase d u p on t h e p r e s e n c e / a b s e n c e o f a 4 7 k o h m p u l l - d o w n r e - sist o r on s d a t a as sh o wn in fig u re 1. the mast e r/sl a v e d ec i s i o n is made d u ring i n it i al p o w e r - u p as sh o wn in fig u re 4. in m a s t er mod e , s c lk a nd lr c k a re ou t pu t s w h er e t h e mclk / lr c k fr e qu e n c y r a tio i s 2 5 6 . lr c k will a pp e ar as a n ou t put 1 27 m c lk cyc l es in t o the i ni t ia l i z a ti o n s e qu e nc e . at t his t ime, p o we r is a p pl i ed t o t h e i n ter n al v o lt a ge r e fere n c e and t h e a n al o g i n pu t s w i ll m o ve to ap- p rox i m a te l y 2 . 4 v o lts. s d a t a is s t at i c l o w d uri n g the i ni t ia l iz a ti o n a nd hi g h p ass f i lt e r set- t li n g seq u en c e, whi c h re q uir e s 1 1 , 2 65 lrck cyc l es (235 ms at a 48 k h z o u tp u t sample rat e ). in s l a v e mo d e, s c lk a n d l r ck are i n pu t s w h er e t h e mclk / lr c k fr e qu e n c y r a tio must b e e i th e r 25 6 , 38 4 or 5 12 . o n ce t he m c lk a n d l r ck a re d et e ct e d, mc l k o cc u rren c es are c ou n ted o v er o n e l r ck per i od to d e termi n e t he m c l k / lrc k fre q ue n c y ra t io. at t h is t i m e , p o w e r is ap p li e d to the in t ern a l v ol t age r e fere n ce a n d t h e an a log i np u ts wi l l m o ve t o a ppr o xi- m a t e l y 2 . 4 v o l t s . s d a t a i s s t a t i c h i g h d u r i n g t h e i ni t ia l iz a ti o n a n d h i gh p ass f i l ter se t tl i ng se- q ue n ce, w h ich re q uir e s 11 , 2 6 5 lr c k c y cl e s ( 2 35 ms at a 4 8 khz s a m p le r a te). cs5 3 3 0 a /cs5 3 3 1 a 10 ds1 3 8f 2
th e cs 5 33 0 a a n d c s53 3 1a h a v e a p o we r - d o wn m o de wh e rein t yp i cal c onsump t ion d rops t o 0 . 5 m w . t h i s i s i n i t i a t e d w h e n a l o ss of c l o ck i s d e t e c t e d o n e i t h e r t h e l r c k o r m c l k p i n s in sl a v e mod e , or t h e mclk p i n i n m a s t er m o de. th e i n it i al i za t ion se q ue n c e will begin wh e n m c lk, and l r c k for s l a v e mod e , a re r e s t or e d. in sl a v e mo d e p o we r -d o wn, t h e cs 5 33 0 a a n d cs 5 33 1 a wi l l a da p t to ch a ng e s i n mclk/lr c k fre q ue n c y rat i o d uri n g t h e i n it i a- t i li z at i o n seq u en c e. it is r e commen d e d th a t c l oc k s n ot b e a p pl i ed t o t h e d e vi c e pri o r t o p o wer su p ply s e tt l in g . a r e s e t c i rcu i t may b e im- p l emen t ed b y ga t ing the mclk s i gn a l. groun d ing a nd p o wer sup p ly decou p ling as wi t h any hi g h resol u ti o n co n v er t e r , t he adc r e qu i res c aref u l at t en t ion t o p o wer s u pp l y a n d g rou n di n g a rran g emen t s if i ts po t en t ial perf o rm- a n c e i s t o b e r ea l i z e d . fi g u r e 1 s h o w s t h e r e commen d ed p o wer a rran g emen t s with v a+ c on n ec t e d to a cl e an + 5v sup p l y . d e co u pl i ng c ap a ci t ors sh o uld b e as n ear to t h e ad c as p o s- s i b l e , w i t h t h e l o w v a l u e c e r a m i c c a p a c i t o r b e i n g t he n ear e s t . t o m i nimi z e di g it a l no i s e , c o nn e ct t he adc di g it a l ou t pu t s o n ly to c m o s i np u ts. the pr i n t e d c irc u i t bo a rd l ay o u t s h ou l d h a v e se p ara t e a n a l o g and d i gi t a l r e g i ons a n d gro u nd p la n es . an e v a lu a ti o n b o ard, cd b 53 3 0a or c db5 3 31a, is a v ai l ab l e wh i ch d e m o nstra t es t he o pt i m u m l ay o ut a nd p o w e r s u pp l y arra n geme n ts, a s well as a ll o wi n g fast e v al u at i o n of t he c s53 3 0a a n d cs 5 33 1 a. f ig u re 4. CS5330A / 31a ini t ial i zatio n an d p o wer-dow n seq u ence c s 53 3 0 a / c s 5 3 3 1a ds1 3 8f 2 11
di g it a l f i lt e r fi g ures 5 thr o ugh 8 sh o w t h e a tt e nu a ti o n c har a c- t e risti c s o f the di g it a l f il t er i n cl u ded in t he adc. t he fi l ter r e s p onse sc a les l i ne a rly w i th samp l e ra t e. the x -ax i s h a s b e e n norma l iz e d t o fs, a n d c a n be sca l ed by mu l ti p ly i ng t h e x-a x is by t h e syst e m s a mple r a te , i . e . 48khz. 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 normalized input frequency f igure 5. CS5330A/31a digi t a l f i l te r s top b a nd reject i o n 0.05 0.04 0.03 0.02 0.01 0.00 -0.01 -0.02 -0.03 -0.04 -0.05 0 0.1 0.2 0.3 0.4 0.5 normalized input frequency f igure 7. CS5330A/31a digi t a l f i l te r p a s s b a nd rip p le 0.0 -10.0 -20.0 -30.0 -40.0 -50.0 -60.0 -70.0 -80.0 -90.0 -100.0 0.40 0.45 0.50 0.55 0.60 0.65 0.70 normalized input frequency f ig u re 8. CS5330A / 31a dig i ta l f i lte r t ra n s i tio n band . 4 6 . 4 7 . 4 8 .49 . 5 0 . 5 1 . 5 2 . 5 3 . 5 4 - 1 0 -8 -6 -4 -2 0 2 m agni t u d e ( d b ) n o r m a l i z e d i n p u t f r e q u e n c y f ig u re 6. CS5330A / 31a dig i ta l f i lte r t ra n s i tio n band schematic & layout review service confir m optimum schemati c & layout befor e buildin g y ou r board. confir m optimum schemati c & layout befor e buildin g y ou r board. fo r ou r fre e revie w service cal l application s engineering. fo r ou r fre e revie w service cal l application s engineering. call : (512 ) 445-7222 cs5 3 3 0 a /cs5 3 3 1 a 12 ds1 3 8f 2
p i n descr i ptions powe r su p ply connect i ons v a + - positi v e ana l o g p owe r , pin 7. posi t i ve a n al o g sup p ly (n o m i na l ly + 5v). a gnd - an a log g r ound, pin 6. an a log gro u nd r e fere n ce. a n a l o g i n p u t s ainl - an a log left channel input, p i n 8. an a log in p ut f o r the left ch a nn e l. t y pi c al l y 4v p p for a fu l l-sca l e in p ut sig n al. ain r - ana l og right channel input, pi n 5 . an a log in p ut f o r the rig h t c h an n el. t yp i ca l ly 4 vpp f o r a f u ll-sc a le i n put si g na l . di g it a l inputs mclk - m a s t er cl o ck inpu t , pin 4. so u rc e for t h e de l ta-si g ma mod u la t or samp l ing a n d d ig i tal f il t er c lo c k. samp l e r a tes a n d di g it a l fil t er c h ara c ter i s t ics sca l e to the mc l k freq u enc y . di g it a l inputs or ou t p uts sclk - serial data c l ock, p i n 2 . sclk is a n i np u t c lo c k a t a n y freq u ency fr o m 3 2 t o 64 the o u tp u t wor d rat e . sclk c a n a l so be a n ou t put c lo c k at 6 4 i f i n t h e m a s t er m o de. data is c lo c k e d o u t o n the f a ll i n g ed g e of sclk. lrck - l e ft/ri g ht clo c k, pin 3. lrck se l ec t s t h e l eft o r rig h t c h an n el f o r ou t put on s d a t a. the lr c k fr e qu e n c y must be a t t h e ou t put samp l e rat e . lrck is an o u tp u t cl o ck if in m a s t e r m o de. alt h ou g h t he ou t pu t s of e a ch c ha n nel are t ransmit t ed a t d i f fer e nt t i m e s, the t w o w o rds i n an l rck c y cle r e prese n t simul t an e ously s a m p led an a log in p uts. di g it a l out p uts s d a t a - a ud i o seri a l d a ta output, p i n 1. t w o s comp l ement ms b - f i rst ser i a l d a t a is o u tp u t o n t h is p in. a 4 7 k o hm resist o r on t h is p i n wi l l p l ace the cs5 3 30a / 31a i nto master m o de. serial data output sda t a a i n l lef t ana l og input ser i a l da t a c l ock sc l k va+ analog power le f t/r i gh t c l ock l rck agnd analog ground mas t er c l ock mc l k a i nr r i gh t ana l og input 7 2 6 3 5 4 8 1 cs5 3 3 0 a / c s 5 3 3 1a ds1 3 8f 2 13
para m e ter d e finiti o n s reso l utio n - t h e to t al n u m b er of possib l e ou t put c od e s is e qu a l t o 2 n , where n = t h e n umber of b its in the ou t put w ord for e a ch c ha n ne l . dyn a mic ran g e - t h e ra t io o f the full s c ale rms v al u e of t he si g nal to t he rms s u m o f all ot h er s p e c t r a l c o m p on e nts o v e r the spe c i f ied b a ndw i dt h . dyn a m i c r a nge is a sig n al- t o-n o ise measur e m e n t o v e r t h e sp e ci f i e d b an d wid t h ma d e w i t h a - 6 0 d bfs si g na l . 60 d b is t h en a dd e d to the resul t ing m e asureme n t to refer t h e m e asureme n t to fu l l s c al e . this te c hn i que e nsures th a t t h e d i s t ort i on c ompo n en t s a re b e l o w the no i se l e v el and d o not e f fe c t the me a s u remen t . this measur e m e n t te c hn i que h a s be e n a cc e pt e d b y t h e aud i o eng i ne e ring soc i et y , aes 1 7-1 9 91, a n d t h e e l ec t ron i c ind u s t ries assoc i at i o n of ja p an, eiaj cp- 3 07. t o tal harmon i c distortion+n o ise (thd+n) - the r a tio o f t h e rms v al u e o f the si g nal t o the rms sum of a ll o th e r s p ec t ral c ompo n en t s o v er t he sp e ci f i e d b a nd w i dth (ty p ic a lly 10 hz to 2 0 khz), including disto r tio n components. expressed in decibels. measured a t - 1 a n d - 2 0 dbfs a s sug g ested in aes1 7 -19 9 1 an n e x a. t o tal h a rm o nic distort i on - t h e r a tio o f the rms s u m of a l l harmo n ics u p t o 20 k hz to the rms v al u e of t he si g na l . inte r ch a nnel phase d e v i ati o n - t h e p h a s e d i f fer e n c e b e t we e n t h e l e f t a n d r i g h t c h a n n e l s a m p l i ng t i m e s. inte r ch a nnel i s o lation - a me a s u re o f cr o sst a l k be t ween t h e l eft a nd r i ght ch a nn e ls. m e asured for e a c h ch a nn e l a t t h e co n v er t er s o u tp u t w i t h the i n put u n der t est a c g rou n ded and a fu l l -sca l e sig n al a pp l ied to t he o th e r ch a nn e l. uni t s i n d e ci b els. inte r ch a nnel ga i n m i s match - the gain di f fere n ce b etw e en l eft a nd r i ght c ha n ne l s. uni t s in d ec i be l s. gain er r o r - t h e d e v i at i on o f the m e asured full s c ale ampl i tu d e from t h e i d eal full s c ale ampl i tu d e v a l u e . gain d r ift - the c ha n ge i n ga i n v al u e wi t h temp e rat u re. u n its in p p m/ c. b i pol a r offs e t er r o r - t h e d e v i a t i o n o f t h e m i d - s c a l e t r a n s i t i o n ( 1 1 1 . . . 1 1 1 t o 0 0 0 .. . 0 0 0 ) f r o m t he i d ea l . u n its in ls b s. cs5 3 3 0 a / c s 5 3 3 1a 14 ds1 3 8f 2
refer e nces 1) " area e f f ic i ent d e cima t ion f i lt e r f o r a n 18- b it de l ta- si g ma adc" by k. l i n a nd j . j. p au l os . p a - p e r p resen t ed at t he 9 8 th c o n v e nt i on of t h e aud i o e n gi n eer i ng so c ie t y , fe b u a ry 19 9 5. 2) " an 18- b it, 8-pin st e reo dig i ta l -to-a n al o g c o n v ert e r " by j.j. p a u los, a . w . kron e , g.d. k a m a th a n d s . t . dup u ie. p ap e r p resen t ed at t he 9 7 th c o n v e nt i on of t h e aud i o e n gi n eer i ng so c ie t y , n o v e m- b e r 19 9 4. 3) " an 18- b it d u al- c ha n nel o v ersamp l ing del t a-si g ma a/d c o n v e rte r , wi t h 1 9 -bit mono app l ic a - t i on ex a m p le" b y cl i f s a nc h ez. p ap e r p resen t ed at t he 8 7 th c o n v e nt i on of t h e aud i o e n gi n eer i ng so c ie t y , oc t ob e r 19 8 9. 4) " t h e e f fec t s of samp l ing c lo c k j i tt e r o n nyq u ist sampl i ng ana l og- t o -di g it a l c o n v ert e rs, a nd o n o v e rs a m p li n g de l t a s i gm a adc ? s" b y st e v en h a rris. pa p er prese n ted a t the 8 7th c o n ven t i on o f t he au d io en g in e eri n g so c ie t y , oc t ob e r 19 8 9. 5 ) "a st e re o 16- b i t del t a-si g ma a/ d co n v er t er f o r di g it a l a u di o " by d . r. w el l an d , b . p . de l sig- n o re, e . j. swanso n , t . t an a ka, k. hamash i t a, s. har a , k. t a k asuk a . pa p er prese n ted a t the 8 5th c o n v e nt i on of t h e aud i o e n gi n eer i ng soc i et y , n o vembe r 1 9 88. p a ck a g e descript i ons no t e: t he eiaj pa c ka g e is n o t a sta n dard j e dec p ac k age si z e. f g j i h b a millimeters inches min max ma x mi n dim h i j a b ty p 1.27 0.050 typ d 0 0.01 0 0 0.25 e 0.070 0.07 4 1.77 1.88 0.006 0.01 0 0.15 0.25 8 0 8 0 0.03 0 0.01 9 0.48 0.76 0.31 9 0.302 0.203 0.21 0 5.15 5.35 7.67 8.1 5.18 5.4 0.204 0.213 d c 8-pin soic e f 0.33 0.51 0.020 g c 0.013 cs5 3 3 0 a / c s 5 3 3 1a ds1 3 8f 2 15
notes cs5 3 3 0 a / c s 5 3 3 1a 16 ds1 3 8f 2
features demonstrates recommended layout and grounding arrangements c s 84 0 2 a ge n er a te s a e s/ e bu , s / pd i f, & e i aj - 34 0 c o mp a ti b l e di g it a l a ud i o buffered serial output interface digital and analog patch areas on-board or externally supplied system timing general description t h e cdb 5 33 0 a/ 3 1a ev a luatio n b oard is a n e xc e llent me a ns f o r qui c kly ev a luatin g t h e cs53 3 0a/31a 18 - b i t , stere o a/d c on v er t e r. e v alu a t i o n r e quire s a d igital si g nal pro c es s or, a low d istor t i o n a n alo g sig n al s o u r c e a n d a p o w er s u p p l y . a n alo g inp u t s are pro- vi d ed vi a rca c o nn e cto r s f o r b o t h c ha n nel s . als o in c lud e d i s a cs84 0 2a d igital a udi o i n t e rfa c e t r a nsmitter whic h ge n erates aes / ebu, s/pdif, a n d eiaj-34 0 c o mp a ti b le au d io d a t a . t he d igital a u dio d ata is a v aila b le via rca ph o no, an d o ptical c o nn e cto r s. t h e ev a luatio n bo a r d may a lso b e c o nfigure d t o ac c ept e x t e r n al timing s ign a ls for op e r a ti o n i n a us e r ap p lica- tion d u ri n g sy s t e m d ev e lop m e nt. ordering informa t i on: cdb53 3 0a, cdb 5 33 1 a evaluation board for CS5330A / cs5331a cdb5330a cdb5331a ana l og filter digital a u d io outp u t c s 8402a d igital audio i n t e r fa ce CS5330A/31a i / o f o r c l ocks an d d a t a cirrus logic, inc. crystal semiconductor product division p.o. box 17847, austin, tx 78760 (512) 445-7222 fax: (512) 445-7581 http://www.crystal.com oc t 9 7 ds 1 38 d b 2 17 copyright ? cirrus logic, inc. 1997 (all rights reserved)
cd b 53 3 0a / 31a system ov e r v iew th e cdb 5 33 0 a/3 1 a e v a lu a ti o n b oard is an ex- c e l l e n t mea n s of q u ic k ly e v a l ua t ing t h e cs 5 33 0 a/3 1 a. the cs 8 40 2 a d ig i tal a ud i o i n- t e rfa c e t ransmit t er p r o v i des a n e asy i nt e rfa c e t o d i gi t al a ud i o sig n al p roc e ssors, in c lu d ing t he ma- jority of digit a l au d io t e st eq u ipm e nt. the e v a lu a ti o n b o ard h as be e n d e s i gn e d to ac c ept a n a n al o g i n pu t , a nd p r o v i de a di g it a l o u tp u t t h at is e i th e r o p ti c a l or c oa x . t h e e v a l u a ti o n b o ard a l so a l l o ws the user to s u pp l y c lo c ks a n d d ata t h rou g h a 1 0 -p i n h e ad e r for system d e v e lo p m e n t. th e cdb 5 33 0 a/3 1 a sch e m a tic h a s b een par t i- tioned into 5 sch e mat i cs sh o w n in f ig u r e s 2 t h rou g h 6. each p a rti t io n e d s c hema t i c is re p re- sented in th e syste m diagra m sh o wn in figure 1. no t ice t hat t h e t h e s y s t em d ia g ram a l so i n cl u des t h e in t erco n ne c ti o ns be t w e en t h e part i ti on ed sch e m a ti c s. cs 5 33 0 a/ 3 1a ana l og to dig i tal c o n v ert e r a d e s c rip t ion of the c s53 3 0a/ 3 1a is i n c l ud e d in the cs5 3 30a / 31a d ata s h ee t . cs 8 40 2 a di g it a l au d io int e rf a ce fi g ur e 4 sh o ws t h e c s84 0 2a circuitry which imp l emen t s aes / ebu, s/ p di f and eiaj cp- 3 40 d i g it al a ud i o i n t e r f a c e st a nd a rds. t h e cs 8 40 2 a circ u i t is h ardware co n f i gured f o r c o n- sumer mo d e. sw2 p r o v i des 8 dip swi t che s t o sel e ct v ari o u s mo d es a nd bi t s fo r t h e cs8 4 02a, t ab l es 4-5. see th e cs8401a/cs8402 a data she e t f o r d e ta i led i n format i o n o n the o p era t ion of t h e c s84 0 2 a and the digita l audio standards. the op e rat i on o f t he cs8 4 02a and a disc u ssi o n of t he d ig i tal a ud i o in t er f a ce are i nc l ud e d in t h e 1 9 9 4 c r y s t al s e mic o nd u ct o r a u dio d a ta book . c s84 0 2a d a ta f o rmat the cs8 4 02a d ata format c a n be set wi t h jump- er s m0, m1, and m2. th e s e form a t s ar e sh o wn i n t h e c s84 0 2a d at a s h eet fo u n d i n the 1 9 94 crystal semiconductor a udio data book . the f o rm a t s e le c ted must be c o m p at i ble wi t h t h e cor- responding dat a f o r ma t o f t h e cs53 3 0 a /3 1 a sh o wn i n fi g u res 2 a nd 3 of t h e cs5 3 30a / 31a d a t a s h e e t . t h e d e f a u l t s e t t i n g s f o r m 0 - m 2 o n t h e e v alua t i o n b oa r d a r e g i v e n i n t a bl e s 2 a n d 3. the compa t ib l e d ata forma t s for t he cs8 4 02a a nd c s53 3 0a/ 3 1a ar e : c s84 0 2a format 1; c s53 3 0a c s84 0 2a format 4; c s53 3 1a an a l o g i npu t b u ff e r the r ec o mmen d ed i n pu t f i lt e r r eq u i r e d f o r t h e c s53 3 0a/ 3 1a has be e n c ombi n ed with a un i ty g a i n i n p u t b u f fer ( s e e f i g u r e 2) . t h e a n a l o g i n - p u t f i lt e r uses a mo t o ro l a m c 33 2 0 2 s i ngle su p p l y , du a l o p -amp. po w er supp l y c i r c uitry p o wer is s u pp l ied t o the e v al u at i on bo a r d b y t w o b in d ing p ost s (gnd, +5v), fig u re 6. the +5v i np u t su p pl i es p o wer t o t h e +5 v o lt d ig i tal cir- cuitry (v d +), an d t he + 5 v a n al o g circ u itry ( v a+). the an a log s u pp l y is d e r i ved fr o m t h e +5v b i nd i ng p o st t h rou g h a f e rrite be a d . inpu t /out p ut f o r c locks and data the e v al u at i on b o ard h a s be e n d esig n ed to al l o w t h e in t er f a c e t o e x t ern a l systems via the 10- p in c lo c k i / o h ea d e r , hd r 2. th i s h e ad e r a l l o ws t he e v al u at i on b oard t o ac c ept ext e rna l ly g e ner- a t e d c l o c k s . t h e s c h e m a t i c f o r t h e c l o c k / d a t a i / o i s s h o wn in fi g ur e 5. th e 74h c 243 tra n s c e i v er functions a s a n i / o b u f f e r w h e r e th e m a s - ter/sl a ve j u mper de t ermin e s i f t h e t ransc e i ver o p era t es as a tr a nsm i tt e r or re c e i v e r . cd b 5 3 3 0 a / cdb 5 3 3 1 a 18 ds 1 38db2
t he tr a nsce i v e r o per a tes as a tra n smi t ter with t h e maste r /sl a v e jump e r in t h e master p osi- t i o n . l r c k , s d a t a , a n d s c l k from t h e cs5330 a /31a wil l b e a v a il a bl e o n h d r 2 . hdr 2 2 must be in the 0 posi t ion a n d hdr 2 3 must b e in t h e 1 p o s i ti o n f o r mclk t o b e a n o u tp u t a n d to a v oid b us co n te n ti o n on mclk. t h e tr a nsce i v e r o p era t es as a re c e i v er with t h e m a st e r /s l a ve jump e r i n t h e sl a v e pos i - t i on. l r c k and sclk o n hd r 2 b ec o me i n pu t s. h o w e ve r , the rec o mme n ded mo d e of op e rat i on is to ge n era t e mclk on the e v al u at i on b o ard wi t h hdr 2 3 in t h e 0 posi t ion a nd hdr 2 2 in t h e 1 p o s i ti o n. t h ese d e f a u lt se t ti n gs al l o w m c lk t o be an o u tp u t, with l r ck a n d sclk as i n pu t s. mclk i s al w a y s an ou t put fro m t h e e v a lu a ti o n b o ard. groun d ing a nd p o wer sup p ly decou p ling the c s53 3 0a/ 3 1 a req u ires c aref u l a tt e nt i o n to p o w e r su p p ly a nd gr o un d ing a rran g emen t s to op- tim i ze p e r f o r m a n c e . fi g u r e 2 s h o w s t h e r e comm e nd e d p o w e r a r r a n gem e n t s . t h e cs53 3 0 a /3 1 a is p o s i t i o n e d o v e r t h e a n a l o g g rou n d p la n e, n e a r the digital/analog ground p l a n e s p l it , t o mi n i mize t h e d ista n c e th a t t he c lo c ks t r a v e l . t h e s e ries r e s i s t ors are pr e s e n t on t he c l o c k l i nes to red u ce t he e f fe c t s o f t ransi e nt c urre n ts when dr i vi n g a c ap a ci t i ve l o ad i n master mo d e, a n d re d u ce c lo c k o v e rs h oot w h e n ap p ly- i ng e x ter n al c l oc k s to t he cs 5 33 0 a/3 1 a i n s l a v e mo d e. th i s l ay o ut t ec h ni q ue i s u s e d to min i m i ze d i gi t al n ois e and to i n s u re p rop e r p o wer sup p ly ma t ch- i ng / s e qu e nc i ng. th e decoupling capacitors are l oc a ted as c l os e to t h e cs 5 33 0 a/3 1 a a s p o ssi- b le. ext e ns i ve use o f gro u nd p l ane f i l l on b o th t h e a n al o g and d ig i tal se c ti o ns o f t h e e v al u at i on b oard y i eld l a r g e r e du c ti o ns in rad i at e d n o ise ef- fects. connec t or i npu t / ou t put signal present + 5v in p ut (vd + ) f o r cs8 4 02a a n d digital s e ction ( v a+) f o r cs5 3 30a/3 1 a a n d an a lo g in p ut filter o p-amp gnd in p ut g rou n d co n ne c ti o n from p o w e r s up p ly ainl in p ut l e ft ch a nn e l a nal o g inp u t ainr in p ut ri g ht c ha n nel a n alo g i n put mc l k, sclk, lrck, s d a t a input/output i/o f or maste r , se r ial, le f t/ r ight clo c ks, and se r ial d a t a di g it a l o u t p ut o u t p ut d igital au d io inter f a c e outp u t vi a c oax optical outp u t o u t p ut d igital au d io inter f a c e outp u t vi a o ptical t a ble 1 . s y s t e m con n e c t i o ns cd b 5 3 3 0 a / cdb 5 3 3 1 a ds1 3 8db2 19
jumper purpose position f unction se l ected hdr1 cs 5 33 0 a / 3 1a sclk s e lectio n f or cs 8 40 2 a * 5 33 0 a cs 5 33 0 a s e lected 5 3 31a cs 5 33 1 a s e lected hdr10 ma s ter / sl a ve mode s e lection * hi g h mas t er m o de s l a ve mode l o w hdr9 s e lects s o u r ce of sy s t e m cl o cks *hi g h mas t er m o de (53 3 0a clo ck s) l o w s l a ve mod e (external clo c ks) hdr22 hdr23 cl o ck i / o *0 *1 s e e input/output for clocks and data s e c t i o n of t e x t hdr6 s e lects 2 5 6 or 5 1 2 mclk f or cs84 0 2a * 256 5 1 2 s e e cs84 0 2a data s h eet f or details hdr5 (m2) cs 8 40 2 a m o d e s e lect * l ow s e e cs84 0 2a data s h eet f or details hdr4 (m1) *low hdr 3 (m0) * hi g h * d ef a u l t s e t t i n g fr o m f a c t o r y ta b l e 2. cdb5 3 30a j u m p e r s e le c t abl e o p tio n s jumper purpose position f unction se l ected hdr1 cs 5 33 0 a / 3 1a sclk s e lectio n f or cs 8 40 2 a 5 3 30a cs 5 33 0 a s e lected * 5 33 1 a cs 5 33 1 a s e lected hdr10 ma s ter / sl a ve mode s e lection * hi g h mas t er m o de s l a ve mode l o w hdr9 s e lects s o u r ce of sy s t e m cl o cks *hi g h mas t er m o de (53 3 1a clo ck s) l o w s l a ve mod e (external clo c ks) hdr22 hdr23 cl o ck i / o *0 *1 s e e input/output for clocks and data s e c t i o n of t e x t hdr6 s e lects 2 5 6 or 5 1 2 mclk f or cs84 0 2a * 256 5 1 2 s e e cs84 0 2a data s h eet f or details hdr5 (m2) cs 8 40 2 a m o d e s e lect * hi g h s e e cs84 0 2a data s h eet f or details hdr4 (m1) *low hdr3 (m0) *low * d ef a u l t s e t t i n g fr o m f a c t o r y ta b l e 3. cdb5 3 31a j u m p e r s e le c t abl e o p tio n s cd b 5 3 3 0 a / cdb 5 3 3 1 a 20 ds 1 38db2
s w i tc h # 0 = c l o s e d , 1 = op e n c o m m e nt 3 p r o=0 con s umer mode c0=0 1,4 fc1, fc0 c 2 4,c25,c2 6 ,c 2 7 - sam p le f r e qu e ncy 0 0 * 0 1 1 0 1 1 0 00 0 - 44. 1 khz 0 10 0 - 4 8 khz 1 10 0 - 3 2 khz 0 00 0 - 44.1 kh z , cd mode 2 c3 c3 , c4 , c5 - emphasis (1 of 3 bi t s) *1 0 0 00 - n o ne 1 00 - 5 0/15 m s 5 c2 c 2 - co p y/co p y r ight 1 *0 0 - c o p y i nh i b i t e d / c o p y r i g h t a s s e r t ed 1 - co p y p e r mi t te d / c o p y r ig h t not ass e r ted 6 c15 c 1 5 - ge n eratio n status 1 *0 0 - definition is b a se d o n cate g o r y c o d e . 1 - see cs8 4 02a data sh e et, ap p . a 8,7 c8, c9 c 8 - c 1 4 - cate g o r y co d e ( 2 o f 7 bits) 1 1 1 0 0 1 * 0 0 0 00 0 00 0 - gen e ral 0 10 0 00 0 - pcm e nc o der/de c od e r 1000000 - compact disk - cd 1 10 0 00 0 - di g it a l a u di o t ap e - d a t * d ef a u l t s e t t i n g fr o m f a c t o r y tabl e 4 . cs8 4 02a swi t c h d e f i n i t ion s - co n s u m e r m o de s w i tc h # 0 = c l o s e d , 1 = op e n c o m m e nt 3 p r o = 0 pro f e s s ion a l m o d e c0 = 1(d e f a u lt) 1 cre l oc a l s a mple ad d r e ss co u nte r & reli a bility fla g s d e fa u l t 0 1 disa b l e d inte r nally g e ner a t e d 2,5 c6, c7 c 6 , c 7 - sampl e f re q ue n cy d e fa u l t 1 1 1 0 0 1 0 0 0 0 - not i n dic a t e d - de f ault t o 4 8 khz 01 - 4 8 k h z 10 - 4 4 . 1 k h z 11 - 3 2 k h z 4 c1 c 1 - a u dio d e fa u l t 1 0 0 - n o r mal a u d i o 1 - non- a udio 6 c9 c 8 ,c 9 ,c 1 0,c11 - c h an n el mod e (1 of 4 bits) d e fa u l t 1 0 0 00 0 - not i n dic a t e d - de f ault t o 2 - c ha n nel 0 10 0 - s t e r e op h onic 8 ,7 e m 1 , e m0 c 2 , c 3 , c 4 - e m p h a s i s (2 o f 3 b i t s) d e fa u l t 1 1 1 0 0 1 0 0 0 00 - n o t indi c a ted - d e f a ult to n o ne 1 0 0 - n o e mph a sis 1 10 - 5 0/15 m s 1 1 1 - ccit t j .17 ta b l e 5. cs 8 40 2 a s wi t c h de f i n i t i o n s - p r o f e s s i o n a l m o d e cd b 5 3 3 0 a / cdb 5 3 3 1 a ds1 3 8db2 21
f i g u r e 1 . s y s t e m bl o c k dia g r a m a n d sig n al f l o w cd b 5 3 3 0 a / cdb 5 3 3 1 a 22 ds 1 38db2
f i g u r e 2. c s 533 0a / 31a an d c o nn ec t i o n s cd b 5 3 3 0 a / cdb 5 3 3 1 a ds1 3 8db2 23
figure 3. mclk genera t io n and power down cd b 5 3 3 0 a / cdb 5 3 3 1 a 24 ds 1 38db2
fi gu re 4. c s 8 402 a d i gi t a l a u di o t r a n s m i t t e r c o nn ec t i o n s o p ti on al t o s h i b a p a rt t o t x 1 2 3 av ail a b l e th ro ug h in si gh t e l ect ro ni cs sc ho t t c o r p. tr a n s f o r m e r p a r t 1 219 60- 60 2 av ai l a b l e t h r o ugh s c h o t t c o r p . , wa yz a t a , m n . cd b 5 3 3 0 a / cdb 5 3 3 1 a ds1 3 8db2 25
f i g u r e 5. i /o i n t er f a c e f or cl o c k s a n d d a ta fig u r e 6. p o we r su p ply cd b 5 3 3 0 a / cdb 5 3 3 1 a 26 ds 1 38db2
fig u r e 7. cdb5 3 30a/3 1 a c o m po n e n t sid e sil k s c r e e n cd b 5 3 3 0 a / cdb 5 3 3 1 a ds1 3 8db2 27
fig u r e 8. cdb5 3 30a/3 1 a c o m po n e n t sid e ( t o p ) cd b 5 3 3 0 a / cdb 5 3 3 1 a 28 ds 1 38db2
f i gure 9. cdb5330a / 31a solder s i de (bottom) cd b 5 3 3 0 a / cdb 5 3 3 1 a ds1 3 8db2 29

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